Template: Pico LCD 1.44 Spec

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Overview

1.44inch LCD Display Module For Raspberry Pi Pico, 65K RGB Colors, 128 × 128 Pixels, SPI Interface.

Features

  • 128 × 128 resolution, 65K RGB colors, clear and colorful displaying effect.
  • SPI interface, requires minimal IO pins.
  • 4 x user buttons for easy interaction.

Specifications

  • Operating voltage: 3.3V
  • Resolution: 128 × 128 pixels
  • Communication interface: 4-wire SPI
  • Display size: 25.50 × 26.50 mm
  • Display panel: TFT
  • Pixel size: 0.20 × 0.20 mm
  • Driver: ST7735S
  • Dimensions 52.0 × 30.0 mm

Pinout

Pico-LCD-1.44-details-inter.jpg

Dimension

Pico-LCD-1.44-details-size.jpg

LCD and the controller

ST7735S is a 132*162 pixel LCD controller, and this product is a 128*128 pixel LCD, so some processing has been done on the display: the display starts from the second pixel in the horizontal direction, so that the display can be guaranteed. At that time, the position corresponding to the RAM in the LCD is consistent with the actual position.
The LCD supports 12-bit, 16-bit, and 18-bit input color formats per pixel, namely RGB444, RGB565, and RGB666 three color formats, this routine uses RGB565 color format, which is also a commonly used RGB format.
The LCD uses a four-wire SPI communication interface, which can greatly save the GPIO port, and the communication speed will be faster.

Working Protocol

0.96inch lcd module spi.png
Note: Different from the traditional SPI protocol, the data line from the slave to the master is hidden since the device only has a display requirement.
RESX Is the reset pin, it should be low when powering the module and be higher at other times;
CSX is a slave chip select, when CS is low, the chip is enabled.
D/CX is data/command control pin, when DC = 0, write command, when DC = 1, write data
SDA is the data pin for transmitting RGB data, it works as the MOSI pin of the SPI interface;
SCL works the SCLK pins of the SPI interface.
SPI communication has data transfer timing, which is combined by CPHA and CPOL.
CPOL determines the level of the serial synchronous clock at an idle state. When CPOL = 0, the level is Low. However, CPOL has little effect on the transmission.
CPHA determines whether data is collected at the first clock edge or at the second clock edge of the serial synchronous clock; when CPHL = 0, data is collected at the first clock edge.
There are four SPI communication modes. SPI0 is commonly used, in which CPHL = 0, CPOL = 0.